We had 40 regular paper submissions, and 2 position/work-in-progress paper submissions, and accepted 14 regular papers (35%) and both position/work-in-progress papers. We will also have two invited speakers (see Invited Speakers page).
Accepted papers:
| Timon Kelter and Peter Marwedel | Parallelism Analysis: Precise WCET Values for Complex Multi-Core Systems |
| Georgiana Caltais | Expression-based aliasing for OO-languages |
| Dominik Klein | Key-Secrecy of PACE with OTS/CafeOBJ |
| Vu Huong, Yuki Chiba, Kenro Yatake, and Toshiaki Aoki | Checking the Conformance of a Promela Design to Its Formal Specification in Event-B |
| Frederic Mallet and Grygoriy Zholtkevych | Coalgebraic Semantic Model for the Clock Constraint Specification Language |
| Ugo Gentile, Roberto Nardone, Adriano Peron, Valeria Vittorini, Stefano Marrone, Renato De Guglielmo, Nicola Mazzocca, and Luigi Velardi | Dynamic State Machines for Formalizing Railway Control System Specifications |
| Linh H. Vu, Anne E. Haxthausen, and Jan Peleska | Formal Modeling and Verification of Interlocking Systems Featuring Sequential Release |
| Changil Choe and Univan Ahn | Checking Integral Real-time Automata for Extended Linear Duration Invariants |
| Mamoun Filali-Amine, Meriem Ouederni, and Jean-Baptiste Raclet | A Normalized Form for FIFO Protocols Traces, Application to the Replay of Mode-based Protocols |
| Jaco Jacobs and Andrew Simpson | A Formal Model of SysML Blocks using CSP for Assured Systems Engineering |
| Damian Adalid, Maria Del Mar Gallardo and Laura Titolo | Modelling Hybrid Systems in Hy-tccp |
| Raluca Marinescu, Cristina Seceleanu, Henrik Lonn, Henrik Kaijser, Marius Mikucionis, and Alexandre David | Analyzing Industrial Architectural Models by Simulation and Model-Checking |
| Syed Ali Asadullah Bukhari, Faiq Khalid Lodhi, Osman Hasan, Muhammad Shafique, and Joerg Henkel | Formal Verification of Distributed Task Migration for Thermal Management in On-chip Multi-core Systems using nuXmv |
| Amira Methni, Matthieu Lemerre, Belgacem Ben Hedia, Serge Haddad, and Kamel Barkaoui | Specifying and Verifying Concurrent C Programs with TLA+ |
| Andrew Lawrence, Ulrich Berger, Phillip James, Markus Roggenbach, and Monika Seisenberger | Modelling and Analysing the European Rail Traffic Management System in Real-Time Maude |
| Haitao Zhang, Toshiaki Aoki, and Yuki Chiba | A Spin-based Approach for Checking OSEK/VDX Applications |